tm september 2008 ?2008 fairchild semiconductor corporation FDMA410NZ rev.b www.fairchildsemi.com 1 FDMA410NZ single n-channel 1.5 v specified powertrench ? mosfet FDMA410NZ single n-channel 1.5 v specified powertrench ? mosfet 20 v, 9.5 a, 23 m ? features ? max r ds(on) = 23 m ? at v gs = 4.5 v, i d = 9.5 a ? max r ds(on) = 29 m ? at v gs = 2.5 v, i d = 8.0 a ? max r ds(on) = 36 m ? at v gs = 1.8 v, i d = 4.0 a ? max r ds(on) = 50 m ? at v gs = 1.5 v, i d = 2.0 a ? hbm esd protection level > 2.5 kv (note 3) ? low profile-0.8 mm maximum in the new package microfet 2x2 mm ? rohs compliant general description this single n-channel mo sfet has been designed using fairchild semiconductor?s advanc ed power trench process to optimize the r ds(on) @ v gs = 1.5 v on special microfet leadframe. applications ? li-lon battery pack mosfet maximum ratings t a = 25 c unless otherwise noted thermal characteristics package marking and ordering information symbol parameter ratings units v ds drain to source voltage 20 v v gs gate to source voltage 8 v i d -continuous t a = 25 c (note 1a) 9.5 a -pulsed 24 p d power dissipation t a = 25 c (note 1a) 2.4 w power dissipation t a = 25 c (note 1b) 0.9 t j , t stg operating and storage junction temperature range -55 to +150 c r ja thermal resistance, junction to ambient (note 1a) 52 c/w r ja thermal resistance, junction to ambient (note 1b) 145 device marking device package reel size tape width quantity 410 FDMA410NZ microfet 2x2 7 ?? 12 mm 3000 units d d s g d d pin 1 drain source microfet 2x2 (bottom view) 5 1 6 2 3 4 d d s d d g bottom drain contact
FDMA410NZ single n-channel 1.5 v specified powertrench ? mosfet www.fairchildsemi.com 2 ?2008 fairchild semiconductor corporation FDMA410NZ rev.b electrical characteristics t j = 25 c unless otherwise noted symbol parameter test conditions min typ max units off characteristics bv dss drain to source breakdown voltage i d = 250 p a, v gs = 0 v 20 v ' bv dss ' t j breakdown voltage temperature coefficient i d = 250 p a, referenced to 25 c 17 mv/ c i dss zero gate voltage drain current v ds = 16 v, v gs = 0 v 1 p a i gss gate to source leakage current v gs = 8 v, v ds = 0 v 10 p a on characteristics v gs(th) gate to source threshold voltage v gs = v ds , i d = 250 p a 0.4 0.7 1.0 v ' v gs(th) ' t j gate to source threshold voltage temperature coefficient i d = 250 p a, referenced to 25 c ?3 mv/ c r ds(on) static drain to source on resistance v gs = 4.5 v, i d = 9.5 a 17 23 m : v gs = 2.5 v, i d = 8.0 a 20 29 v gs = 1.8 v, i d = 4.0 a 24 36 v gs = 1.5 v, i d = 2.0 a 29 50 v gs = 4.5 v, i d = 9.5 a, t j = 125 c 23 32 g fs forward transconductance v dd = 5 v, i d = 9.5 a 35 s dynamic characteristics c iss input capacitance v ds = 10 v, v gs = 0 v, f = 1 mhz 815 1080 pf c oss output capacitance 130 175 pf c rss reverse transfer capacitance 85 130 pf r g gate resistance f = 1 mhz 2.1 : switching characteristics t d(on) turn-on delay time v dd = 10 v, i d = 9.5 a, v gs = 4.5 v, r gen = 6 : 7.5 15 ns t r rise time 3.9 10 ns t d(off) turn-off delay time 27 44 ns t f fall time 3.7 10 ns q g total gate charge v gs = 4.5 v , v dd = 10 v, i d = 9.5 a 10 14 nc q gs gate to source charge 1.2 nc q gd gate to drain ?miller? charge 2.0 nc drain-source diode characteristics i s maximum continuous drain-source diode forward current 2.0 a v sd source to drain diode forward voltage v gs = 0 v, i s = 2.0 a (note 2) 0.7 1.2 v t rr reverse recovery time i f = 9.5 a, di/dt = 100 a/ p s 12 22 ns q rr reverse recovery charge 2.6 10 nc notes: 1. r t ja is determined with the device mounted on a 1 in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of fr-4 material. r t jc is guaranteed by design while r t ja is determined by the user's board design. 2. pulse test: pulse width < 30 0 p s, duty cycle < 2.0%. 3. the diode connected between the gate and source serves only as protection against esd. no gate overvoltage rating is implied . a.52 c/w when mounted on a 1 in 2 pad of 2 oz copper. b. 145 c/w when mounted on a minimum pad of 2 oz copper.
FDMA410NZ single n-channel 1.5 v specified powertrench ? mosfet www.fairchildsemi.com 3 ?2008 fairchild semiconductor corporation FDMA410NZ rev.b typical characteristics t j = 25 c unless otherwise noted figure 1. 0.0 0.5 1.0 1.5 2.0 0 4 8 12 16 20 24 v gs = 3.5 v v gs = 4.5 v v gs = 1.8 v pulse duration = 80 p s duty cycle = 0.5%max v gs = 1.5 v v gs = 1.2 v v gs = 2.5 v i d , drain current (a) v ds , drain to source voltage (v) on-region characteristics figure 2. 0 4 8 12162024 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 v gs = 4.5 v v gs = 3.5 v pulse duration = 80 p s duty cycle = 0.5%max normalized drain to source on-resistance i d , drain current (a) v gs = 1.8 v v gs = 1.5 v v gs = 1.2 v v gs = 2.5 v n o r m a l i z e d o n - r e s i s t a n c e vs drain current and gate voltage f i g u r e 3 . n o r m a l i z e d o n - r e s i s t a n c e -75 -50 -25 0 25 50 75 100 125 150 0.6 0.8 1.0 1.2 1.4 1.6 i d = 9.5 a v gs = 4.5 v normalized drain to source on-resistance t j , junction temperature ( o c ) vs junction temperature figure 4. 1.01.52.02.53.03.54.04.5 10 20 30 40 50 60 i d = 4.75 a t j = 125 o c t j = 25 o c v gs , gate to source voltage (v) r ds(on) , drain to source on-resistance ( m : ) pulse duration = 80 p s duty cycle = 0.5%max o n - r e s i s t a n c e v s g a t e t o source voltage figure 5. transfer characteristics 0.0 0.5 1.0 1.5 2.0 0 4 8 12 16 20 24 v ds = 5 v pulse duration = 80 p s duty cycle = 0.5%max t j = -55 o c t j = 25 o c t j = 125 o c i d , drain current (a) v gs , gate to source voltage (v) figure 6. 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0.001 0.01 0.1 1 10 t j = -55 o c t j = 25 o c t j = 125 o c v gs = 0 v i s , reverse drain current (a) v sd , body diode forward voltage (v) 30 s o u r c e t o d r a i n d i o d e forward voltage vs source current
FDMA410NZ single n-channel 1.5 v specified powertrench ? mosfet www.fairchildsemi.com 4 ?2008 fairchild semiconductor corporation FDMA410NZ rev.b figure 7. 024681012 0 1 2 3 4 5 i d = 9.5 a v dd = 12 v v dd = 8 v v gs , gate to source voltage (v) q g , gate charge (nc) v dd = 10 v gate charge characteristics figure 8. 0.1 1 10 20 50 100 1000 2000 f = 1 mhz v gs = 0 v capacitance (pf) v ds , drain to source voltage (v) c rss c oss c iss c a p a c i t a n c e v s d r a i n to source voltage figure 9. 03691215 10 -8 10 -7 10 -6 10 -5 10 -4 10 -3 10 -2 v gs = 0 v t j = 25 o c t j = 125 o c v gs , gate to source voltage (v) i g , gate leakage current (a) gate leakage current vs gate to source voltage figure 10. 0.1 1 10 50 0.01 0.1 1 10 40 0.1 ms dc 10 s 1 s 100 ms 10 ms 1 ms -i d , drain current (a) -v ds , drain to source voltage (v) this area is limited by r ds(on) single pulse t j = max rated r t ja = 145 o c/w t a = 25 o c f orw ard bi as safe operation area figure 11. single pulse maximum power dissipation 10 -3 10 -2 10 -1 10 0 10 1 100 1000 1 10 50 single pulse r t ja = 145 o c/w t a = 25 o c 0.5 v gs = 4.5 v p ( pk ) , peak transient power (w) t, pulse width (sec) typical characteristics t j = 25 c unless otherwise noted
FDMA410NZ single n-channel 1.5 v specified powertrench ? mosfet www.fairchildsemi.com 5 ?2008 fairchild semiconductor corporation FDMA410NZ rev.b figure 12. junction-to-ambient transient thermal response curve 10 -3 10 -2 10 -1 10 0 10 1 100 1000 0.01 0.1 1 2 single pulse r t ja = 145 o c/w duty cycle-descending order normalized thermal impedance, z t ja t, rectangular pulse duration (sec) d = 0.5 0.2 0.1 0.05 0.02 0.01 p dm t 1 t 2 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z t ja x r t ja + t a typical characteristics t j = 25 c unless otherwise noted
FDMA410NZ single n-channel 1.5 v specified powertrench ? mosfet www.fairchildsemi.com 6 ?2008 fairchild semiconductor corporation FDMA410NZ rev.b dimensional outlin e and pad layout b. dimensions are in millimeters. c. dimensions and tolerances per a. does not fully conform to jedec registrati on asme y14.5m, 1994 0.10 cab 0.05 c recommended land pattern opt 1 0.10 c 0.08 c c 2.000 2.000 0.05 0.00 0.10 c 2x 2x 0.8 max seating plane 0.10 c (0.20) 0.33 0.20 1 3 4 6 4 6 3 1 pin #1 ident 0.65 1.30 1.35 (0.47) 1.05 0.40 typ 0.65 typ 0.25~0.35 1.000 0.800 2.30 1.00 mo-229 dated aug/2003 (0.56) (0.30) 0.66 recommended land pattern opt 2 4 6 3 1 1.35 (0.47) 1.05 0.40 typ 0.65 typ 2.30 1.00 0.66 no drain or gate traces allowed i n this area pin#1 location 1.05 0.95 d. drawing filename: mkt-mlp06lrev2.
www.fairchildsemi.com FDMA410NZ single n-channel 1.5 v specified powertrench ? mosfet ?2008 fairchild semiconductor corporation FDMA410NZ rev.b rev. i36 trademarks the following includes registered and unregistered trademarks and service marks, owned by fairchild semiconductor and/or its gl obal subsidiaries, and is not intended to be an exhaustive list of all such trademarks. * ezswitch? and flashwriter ? are trademarks of system general corporati on, used under license by fairchild semiconductor. disclaimer fairchild semiconductor reserves the right to make changes with out further notice to any products herein to improve reliability, function, or design. fairchild does not assume an y liability arising out of the application or use of any product or circuit described herein; neither does it convey an y license under its patent rights, nor the rights of others. these specifications do not expand the terms of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers these products. life support policy fairchild?s products are not authorized fo r use as critical components in life support devices or systems without the express written approval of fai rchild semiconductor corporation. as used herein: 1. life support devices or systems ar e devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms build it now? 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